[J-core] Adding SH2/SH4 support to LiteX using J-Core?
D. Jeff Dionne
Jeff at SE-Instruments.com
Tue Feb 7 08:54:15 EST 2017
There are 2 types of test bench around the CPU itself included with the open source release. There is a co-sim with peripherals implemented in C, and there is a pure VHDL simulation. Both are useful for understanding how to integrate the core with other components can be achieved.
The core itself presents a fairly simple interface, with a 16bit read port for instructions and a separate 32bit read/write port for data. That is (basically) enough to get you to the point that instructions start to be executed.
GHDL is the simulation tool we use internally at SEI for development of j-core and associated SoCs. NVC will also simulate all the important constructs in j-core and is easier to build. It still has some problems with VHDL configurations, which j-core uses to support different synthesis options and targets. If you hack that stuff out, it works (as in, the simulation results match). The other problem NVC has is that it can't generate complete signal traces, simply because it hasn't learned how to dump all the complex types that j-core uses into a waveform trace file...
What would be really nice is to have NVC learn how to interface with external programs like verilator, yosys, and for mixed signal work ngspice.
> On Feb 7, 2017, at 05:57, Max Bruckner <max at maxbruckner.de> wrote:
> Am Montag, den 06.02.2017, 09:14 -0800 schrieb Tim Ansell:
>> Normally we would use something like Verilator or iVerilog to get the
>> basics working (CPU executing instructions and interrupts) in
>> simulation, but as J-Core is VHDL there doesn't seem a good FOSS
>> option for doing things that way (although I guess we could try
>> rqou's co-simulation method).
>> : https://github.com/rqou/myhdl-vhdl-verilog-test
> Usually [GHDL](http://ghdl.free.fr) is used for free software VHDL
> J-Core seems to have some scripts in place to simulate the cpu with
> already (although I haven't looked at how to use them yet).
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