[J-core] Instruction Request: Dedicated CPUID Function

Ken Phillis Jr kphillisjr at gmail.com
Sun Oct 22 22:20:17 EDT 2017

On Thu, Oct 22, 2017 at 7:09 AM, Christopher Friedt <chrisfriedt at
gmail.com> wrote:

> I would assume that there RO registers somewhere that contain that
> information. ARM does that, and I assume that most other arch's do as well
> (except for, maybe x86*). Why add another instruction for something that
> would effectively provide zero gain?

None of the processors based on this instruction has a CPUID style
information included. This means that breakage between processor cores
cannot be detected in software. This is based on available documentation
for the SH-1, SH-2, SH-3, and Sh-4 cores.
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