[J-core] Debugging / JTAG?

Rob Landley rob at landley.net
Tue May 17 06:55:25 EDT 2016

On 05/16/2016 12:33 PM, Christopher Friedt wrote:
> Hi list,
> Is anyone planning on implementing a BSD-licensed JTAG slave
> controller for J-Core?

In VHDL? There's half of one but it has timing issues that need fixing.
(Jeff explained it to me last year, but I don't know the current status
of it.)


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