[J-core] VHDL by Example

[Rob Landley]

On 08/16/2016 02:13 AM, D. Jeff Dionne wrote:
> Here is a PDF of the code samples used: http://www.readler.com/codesamples_VHDL.pdf
> 
> It's not bad, but it's quite conventional.   A lot of the coding style used in
> jcore is quite far beyond these examples.

I know, but I've got to start somewhere. I've asked a few times if there
was a good starting point for the two process technique, and the best
anybody can point me at is the paper introducing it.

So it's this or signing up for an intro to vhdl class at the local
community college...

> For instance, jcore makes extensive use of types and records (structures)
> which some of these examples touch on. Of course, you need to understand
> the syntax before you can hope to abuse it ;)

Exactly. :)

> Cheers,
> J.

Rob