[J-core] qemu support
D. Jeff Dionne
Jeff at SE-Instruments.com
Tue Apr 26 23:03:04 EDT 2016
On Apr 27, 2016, at 04:01, Geoff Salmon <gsalmon at se-instruments.com> wrote:
> Even though it's a different processor and I don't know all the differences, I've found the SH-2A software manual http://documentation.renesas.com/doc/products/mpumcu/rej09b0051_sh2a.pdf has a better explanation of exception handling than the SH-2 software manual, if that's what you're looking for.
SH-2A has a different model for exceptions, and it has register windows. It is perhaps closer to SH-4, since it came after. I was told by some of the original architects that exception processing is 'extremely hard to get right' and I took for that (although not stated) they they didn't think they had done a rigorous job there. More specifically, I got that impression of their feeling about 2A.
I therefore am not opposed to 'fixing' exception processing, but would need to be convinced that any fix actually is a fix and not an unnecessary non conformance with the original sh2 behaviour.
More information about the J-core