[J-core] qemu support

[Rob Landley]

On 04/26/2016 02:01 PM, Geoff Salmon wrote:
> On 16-04-26 01:05 PM, Rich Felker wrote:
>> The above ISA summary is great but here are the original official
>> docs.
>>
>> SH-1/2:
>> http://documentation.renesas.com/doc/products/mpumcu/rej09b0171_superh.pdf
>>
> 
> Even though it's a different processor and I don't know all the
> differences, I've found the SH-2A software manual
> http://documentation.renesas.com/doc/products/mpumcu/rej09b0051_sh2a.pdf
> has a better explanation of exception handling than the SH-2 software
> manual, if that's what you're looking for.

SH-2A is a decade newer than SH-2. It was announced in 2006 and shipped
in 2007, which means any new patents on it wouldn't expire before ~2026.

https://en.wikipedia.org/wiki/SuperH#SH-2A

Looking at sh2a docs to clarify stuff is one thing, but we really want
to source anything we actually plan to implement from the sh2 or sh3
documentation, not the sh2a documentation. :)

> - Geoff

Rob