[J-core] Synthesis for Silicon?

Rob Landley rob at landley.net
Thu Sep 12 23:25:28 EDT 2019

On 9/10/19 9:02 PM, D. Jeff Dionne wrote:
>> Why is J-Core clocked so much slower at the same node size than
>> commercial chips which eyed for performance or performance per Watt?
>> Is it in the ISA or just in your design which does not prioritize performance?
> It’s not the ISA, it’s the choice of implementation methodology.
> Squeezing 1GHz out of 180nm is just not necessary (or done) anymore.

To clarify: getting that speed out of that process means you're running enough
current through the chip you can fry an egg on your heat sink.

That's not longer really in fashion. :)


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