[J-core] json instructions set

[Cedric BAIL]

On Thu, Jul 13, 2017 at 12:05 AM, Robert Ou <rqou at robertou.com> wrote:
> On 07/12/2017 12:06 PM, Cedric BAIL wrote:
>> I see. My main concern with tool that parse VHDL... is that this is a
>> hard task. It is quite difficult to find a parser that produce a full
>> AST here. The best I can find in JS is something that extract the
>> interface (thus my question above). And I am not a fan of getting into
>> writing a VHDL parser :-D
>
> Just to let you know, I've been slowly working on a VHDL parser. It is
> "complete" in the sense that it seems to accept all the legal statements
> I've thrown at it. Unfortunately, it doesn't yet output a usable AST because
> it parses certain ambiguous statements in a way that doesn't resolve the
> ambiguity.
>
> In case you want to follow along, the work-in-progress code can be found
> here: https://github.com/rqou/yavhdl

Nice, BSD and a mix of Rust and C++. I have found also that antlr4 has
a GPLv3 grammar (
https://github.com/antlr/grammars-v4/tree/master/vhdl ), but they
would allow generation in any language. As you are still building your
tools, maybe you can get some inspiration from libclang. Especially in
thinking of how to allow a text editor to link with your code to do
semantic based highlighting, auto completion and maybe code correction
? I am still looking if there is a possibility to do so with GHDL, but
it isn't looking great.
-- 
Cedric BAIL