[J-core] json instructions set

Robert Ou rqou at robertou.com
Thu Jul 13 03:05:32 EDT 2017

On 07/12/2017 12:06 PM, Cedric BAIL wrote:
> I see. My main concern with tool that parse VHDL... is that this is a
> hard task. It is quite difficult to find a parser that produce a full
> AST here. The best I can find in JS is something that extract the
> interface (thus my question above). And I am not a fan of getting into
> writing a VHDL parser :-D

Just to let you know, I've been slowly working on a VHDL parser. It is 
"complete" in the sense that it seems to accept all the legal statements 
I've thrown at it. Unfortunately, it doesn't yet output a usable AST 
because it parses certain ambiguous statements in a way that doesn't 
resolve the ambiguity.

In case you want to follow along, the work-in-progress code can be found 
here: https://github.com/rqou/yavhdl

Robert Ou

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