[J-core] Jcore mailing list and tutrle board
jcore at davidjohnsummers.uk
Thu Jul 6 15:07:11 EDT 2017
Thanks for the reply. And its good that you have done j-core.
On 06/07/17 14:11, D. Jeff Dionne wrote:
> On Jul 6, 2017, at 5:58, Rob Landley <rob at landley.net> wrote:
> Pls see inline.
>> On 07/04/2017 02:30 PM, David Summers wrote:
>>> On 04/07/17 09:35, Rob Landley wrote:
>>>> On 07/03/2017 02:41 PM, David Summers wrote:
>>>>> Hi Rob,
>>>>> Anyway, you probably know the answer to what I was planning to ask
>>>>> anyway. Why on the turtle boards did you fix on the Spartan FPGA? The
>>>>> newer Artix is similar price and newer, e.g.:
> The highest volume product Xilinx ship right now is still S6 in the low cost area, not Artix (I have it on good authority).
> We have a bunch of products using S6 on the commercial side, we don't want A7 right now.
> Once we make a change of tools from ISE to Vivado, we can make a compatible upgrade to either A7 or S7.
Was trying to remember where I read that. Thought it was on the Xilinx
web site, but alas it was on wikipedia:
> Major FPGA product families include Virtex
> <https://en.wikipedia.org/wiki/Virtex_%28FPGA%29> (high-performance),
> Kintex (mid-range) and Artix (low-cost), and the retired Spartan
> (low-cost) series.
>>>>> a 100k gate FPGA for just over a $100.
> And that is another reason why. $100 is another class of product. Turtle design goals had a BoM cost of about $50.
Well there is a difference between price and cost. But I take your
point, that you can get Spartan cheaper than Artix.
Here in the UK (different market) on say digikey:
where the 15,100,9,45,100 are the k gates - so prices between the two
seem related to size - without much difference between artix-7 and
spartan-6. However this is just the price I see in the UK when I order
1; so you in japan ordering in larger qualities, yes I'm not surprised
you see different prices (and hence costs).
And good point you made about the ISE vs Vivado - if you have ISE in
house, and thats what you are used to using - it would be a reason to
stick with spartan-6
>>>> This is really a Jeff question, but my understanding is that's only true
>>>> in higher volumes. Spartan 6 is available cheap in lower volumes.
>>> I'll ask Jeff when I sign up ;)
>>> But yes, you answer would make sense, Spartan 6 is end of line - so
> No, that is false. S6 is the current high volume product.
Yes it was wikipedia that threw me, and yes I can't see anything similar
said on xilinx web site, so my bad ...
>>> Xilinx may well be happing moving just what they have left.
> No, most of their customers are still using it. If they tell you otherwise, they are telling a fib (we know the product line people).
I'm sure you are right.
>> Last I heard they're still making them, they're cheap, they work, and
>> they're what we did the majority of testing on when designing the chip.
>> (We've recently moved some stuff to Kintex 7, but that's way more
>>> I expect the line to be dropped soon.
> No, that won't happen, it would obsolete their customer designs, which is bad for business. Most real customers are stubbornly staying put.
>>>>> Rather than the usb to write the bitstream did you think of using jtag?
> That's for engineers, not experimenters / makers. If you want to do that, you can connect a JTAG pod to the Turtle. The goal is zero external tools (which is also the goal on our commercial side).
Guess its just what I'm used to at work, where yes we are developing
FPGAs. Like embedded linux, its like developing a black box - you write
the bitsteam, if the FPGA doesn't come up - how do you debug. At least a
JTAG can read out the pins, so you can get some idea of how the FPGA is
working (or not)
>>>>> E.g. adding FTDI FT232H chip, you could have attached to the jtag pins,
> Completely goes against the point of all open hardware. The AVR that is on the Turtle will be replaced by an ICE40 at some point. No proprietary processors or interfaces anywhere we can help it.
> The point isn't to make another FPGA board, you can buy lots of those. This is an open Raspberry PI board, where you can change everything. Different goals.
Yes - I missed the point that you don't intend the turle board as a
development tool for people messing about with the design of j-core;
e.g. trying different memory mapping for the J4.
So if I read you right, its just so users can write bit sreams - and try
out the various j-core that are avaiable.
And to me I don't count the FTDI FT232H chip as closed design, yes its a
design that FTDI developed, but is just a *very* powerful UART - and
with enough flexability that it can be used to do JTAG. Yes you can bit
bang over a parallel port - but the FT232H is just an easier set up. So
bit like you and the atmel ...
But I accept you point that you want to differentiate from generic FPGA
>> Last I tried using OpenOCD
>> *shrug* Maybe it's improved since then...
> All those tools are horrible. The reason is people get them to work for their needs, and once the project is complete walk away. There are no really serious JTAG tools in the opensource which are clean, extensible and not tied to a specific set of tasks.
Yes - I don't disagree. openocd is a horrible interface. Its 10 years
old, and still only on release 0.10.0, and that isn't a good sign.
As hoffnung would say, half a loaf is better than no loaf. And there
aren't really a huge glut of open jtag tools avaiable, so openocd may
not be good, but its hard to find a free better option.
So yes, maybe its just that jtag isn't for beginners. But that to me is
>>>> C) Requiring openocd setup as a hard prerequisite would probably
>>>> eliminate about 2/3 of our userbase.
> Yes, this is the point.
>>> In work we always buy
>>> what FPGA say you use, which again is $$$$. open jtag is something new,
>>> so little software out there -
> Which is why this looks very different. We don't use anything the vendor requires, because that locks in the vendor. The synthesis tools are wrapped in Makefiles, and you can replace them with another toolchain. This is not a Xilinx, S6 (or A7) board. It's a board that happens to use an S6 to carry the J-Core SoC. Some of our customers use K7, it will be available on a TSMC process soon... Nothing we can't replace can be used.
Confused. Though you had to use Xilinx tools to build the bitsteam. Its
going to be hard to escape from using manufacturer tools for converting
VDHL/Verilog into something that can program a FPGA (whoever makes it).
But surely this is just a tool for developing j-core devices. And once
you go onto an ASIC, you'll be tied to the process that is used for the
layout of the ASIC. But you will end up witha chip based on an open
VHDL, against which it can be to verify how the chip is coded.
>>> and not much call as people doing FPGA unless professionals (where time is $$, so $$$$ for software is a win).
> Which is why this isn't an FPGA board, it's a board that has an SoC in FPGA.
>> We're trying to bring FPGA stuff to hobbyists. An atmel boot processor
>> that flashes the thing from a file on the sd card so you don't _have_ to
>> master a jtag before you can update your FPGA image was considered a win.
>> Searching my back email for openocd didn't bring up the thing that's not
>> openocd, though. Mostly it's threads about debugging GDB integration for
> The SH JTAG is an example of why we don't do things the vendor way. The original implementation might be great (some of our engineers designed it originally, after all) but it doesn't matter... the only pod that works is something like $500, and the software is windows only. Useless to most people out of the gate, and useless to everyone 10years on.
Well that was why I mentioned FTDI FT232H chip, its only a few $
(litterally). Also it (and the FT2232) is what a large number of JTAG
tools are based on, probably all under $100.
But yes, I get that you want people to use the processor, rather than
develop the FPGA - so your buisness model is different. Thats fine, and
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