[J-core] Numato board oscilloscope?
daniel.viksporre at gmail.com
Sat Sep 10 04:46:19 EDT 2016
Another thing that can be done (to save memory, is that instead of
sampling signals), is to write VHDL code that counts specific things
or make IRQ requests based on things, that you normally can't do in a
Like complex triggers to know when to sample, and you can use
asynchronous sampling to save memory or logic, combined with counters
of specific things.
A dream would be to combine c code, and VHDL.
Something like Tinycc could be changed, to declare custom constructs
that change the VHDL code. Then you could declare preconfigured VHDL
code that gets patched in when you need them.
// Daniel V.
2016-09-10 9:51 GMT+02:00, D. Jeff Dionne <Jeff at se-instruments.com>:
> What is the objective of this? To monitor the SDcard activity? If so,
> having the option of integrating a small logic analyser core is both useful
> and something I've been meaning to to.
> It doesn't even have to be very complex. Because the SRAM can be directly
> mapped into the j-core address space, it can be even simpler than this
> The C code shows just how small the UI can be.
> SEI engineers use these, btw: https://www.saleae.com
>> On Sep 10, 2016, at 13:42, Rob Landley <rob at landley.net> wrote:
>> What would be involved in running the bus signals for something like the
>> SD card out to GPIO pins, and what would be involved in having a second
>> j2 system (on its own Numato/Turtle board) act as a software scope
>> reading from ITS gpio pins?
>> There appears to be Linux software out there for this already...
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