[J-core] Adding J1 to the roadmap.
D. Jeff Dionne
Jeff at SE-Instruments.com
Wed May 18 11:42:18 EDT 2016
On May 19, 2016, at 0:29, Geoff Salmon <gsalmon at se-instruments.com> wrote:
> Only a small reduction in occupied slices but a 15% reduction in Slice LUTs used. The timing score goes from 20840 to 21516.
I think it is allowing LUT packing to be less aggressive. Unrelated logic (whatever it happens to be) should still be able to use (most of) those LUTs
>> On the other hand, I think the selective stripping or stripping down of
>> pipeline appendages... barrel shifter, MAC unit, etc is a useful
>> exercise in making the implementation as clean as possible. The
>> compiler support could be tweaked, but some instructions removed might
>> require support in libgcc.a
> Removing groups of instructions and the associated hardware will be interesting. Will need to revisit how cpu_gen works. Will J1 have SH-2's rotate and shift instructions (ROTL/ROTR, ROTCL/ROTCR, SHAL/SHAR, SHLL*/SHLR*)?
Those are good candidates to look at. The trade off is obviously giving the compiler a strategy that works well for bit shifts (really important for embedded hardware) and size. But we don't need a dozen different instructions, nor do we want to invent new instructions.
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