[J-core] Instructions and Databus
Santiago.Gutierrez at viasat.com
Tue Jun 21 11:48:05 EDT 2016
I was wondering if I could get an explanation of the two instr_bus types as well as the two data_bus types. I am making an interface between the J2 core and a memory controller and knowing the details of what gets put out and taken in by the CPU would be very helpful. I saw that they just seem to be arrays of the cpu_instruction and cpu_data types respectively. Some clarification on those types and what some of their contents are would be welcome.
Specifically what are the jp and en signals in the cpu_instruction_o_t? I believe the 'a' signal is just the address of the next instruction, is this correct?
Also what are the en and we signals in the cpu_data_o_t?
Any info on what signals the cpu uses, and how they are used, during a memory read/write would help immensely.
-------------- next part --------------
An HTML attachment was scrubbed...
More information about the J-core