[J-core] Linux on J1?
D. Jeff Dionne
Jeff at SE-Instruments.com
Tue Aug 2 14:59:04 EDT 2016
On Aug 2, 2016, at 11:06, Rich Felker <dalias at libc.org> wrote:
> Disabling dcache is a huge hit to performance. It might be more practical to do a shared-dcache implementation for SMP, where both cores are accessing the same cache (even if subject to stalls when both access it at the same time) that would allow all the snooping logic (and half of the cache memory size) to be omitted.
Also, combined I and D cache. There is an instruction prefetcher in the repo that shows just how far you can go without cache, and it's surprisingly far...
Which reminds me, something to keep on the list: J2 should prefetch the next cache line assuming straight line execution, it doesn't right now and takes the cache miss each line on long runs not already in cache...
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