[J-core] [PATCH 7/7] sh: add device tree source for J2 FPGA on Mimas v2 board

Geert Uytterhoeven geert at linux-m68k.org
Fri Apr 29 05:20:02 EDT 2016


Hi Rob,

On Fri, Apr 29, 2016 at 10:56 AM, Rob Landley <rob at landley.net> wrote:
> On 04/29/2016 01:58 AM, Geert Uytterhoeven wrote:
>> On Thu, Apr 7, 2016 at 5:01 PM, Rich Felker <dalias at libc.org> wrote:
>>> --- /dev/null
>>> +++ b/arch/sh/boot/dts/j2_mimas_v2.dts
>>> @@ -0,0 +1,98 @@
>>> +/dts-v1/;
>>> +
>>> +/ {
>>> +       compatible = "jcore,j2-soc";
>>> +       model = "J2 FPGA SoC on Mimas v2 board";
>>> +
>>> +       #address-cells = <1>;
>>> +       #size-cells = <1>;
>>> +
>>> +       interrupt-parent = <&aic>;
>>> +
>>> +       cpus {
>>> +               #address-cells = <1>;
>>> +               #size-cells = <0>;
>>> +
>>> +               cpu at 0 {
>>> +                       device_type = "cpu";
>>> +                       compatible = "jcore,j2";
>>
>> This brings an interesting question: how do you plan to do IP core versioning?
>> I.e. which version of the HDL code does "jcore,j2" correspond to?
>
> J2 has a stable instruction set based on sh2 plus 2 backported sh3
> barrel shift instructions and one added cmpxchg instruction. Other than
> the cmpxchg (which was added last year when we started adding SMP
> support) it's been stable for a couple years now. We're pondering a run
> of ASICs, which sets it in stone, and don't expect any instruction set
> changes between now and then. (That'll probably be our next kickstarter
> after the turtle boards.)

OK. So that's your answer for the CPU core.

What about the other IP cores, e.g. jcore,emac and jcore,spi2?
The latter already has a "2" suffix?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert at linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds


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