[J-core] Pondering j-core kickstarter ideas.

Rob Landley rob at landley.net
Tue Apr 26 19:00:31 EDT 2016


On 04/26/2016 07:04 AM, Christopher Friedt wrote:
> On Tue, Apr 26, 2016 at 2:18 AM, Rob Landley <rob at landley.net> wrote:
>>>> What would it take to make an actual, minimal hobbyist _device_?
>>
>> That's not a thing you can do in an FPGA, clocks require a timing
>> crystal so you can't implement them with just gates. Your FPGA has to
>> provide one those as existing circuits that the VHDL compiler knows how
>> to connect your circuitry up to (these are called "libraries" in
>> VHDL-speak).
> 
> I think I misunderstood the question and assumed you were talking
> about a potential ASIC rather than an FPGA "device".

No I am talking about a potential asic, I think I didn't understand
_your_ question. On-chip clocks and timers to do... what? (High accuracy
measurements?)

What I was trying to explain is that I don't know how to add more
on-chip clocks and timers in VHDL, because it's the "how do I add a
syscall in C" problem (you call a function out of a library where
somebody did it for you in assembly). So I don't know how to evolve the
VHDL in that direction _before_ talking to a fab.

Somebody else here probably knows the implementation details, though.

Rob


More information about the J-core mailing list