<html><head><meta http-equiv="content-type" content="text/html; charset=utf-8"></head><body dir="auto">On Oct 10, 2019, at 22:24, Joh-Tob Schäg <<a href="mailto:johtobsch@gmail.com">johtobsch@gmail.com</a>> wrote:<br><div dir="ltr"><br></div><blockquote type="cite"><div dir="ltr"><div dir="ltr"><div class="gmail_default" style="font-family:monospace,monospace">Not sure if this is the right place to talk about this but it would be great if there was a short tutorial on how to put your own code in to the RAM/ROM img. </div></div></div></blockquote><div><br></div><div>Ok, sure can do! Give me a day or two, we have an eXecute In Place from SPI flash block that changes the linker scripts etc.</div><br><blockquote type="cite"><div dir="ltr"><div dir="ltr"><div class="gmail_default" style="font-family:monospace,monospace">I played with it in the past but was not successful. I also failed to follow the makefiles.<br></div></div></div></blockquote><div><br></div>Ok, NP. I assume you want a bare metal tutorial... the linux executable side has no special tricks to it.<div><br></div><div>Cheers,</div><div>J.</div><div><br><blockquote type="cite"><div dir="ltr"><div class="gmail_quote"><div dir="ltr" class="gmail_attr">On Thu, 10 Oct 2019 at 23:33, Rob Landley <<a href="mailto:rob@landley.net">rob@landley.net</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">FYI we converted the instruction decoder from a microcode lookup table in ROM to<br>
a VHDL if/else staircase, and now we're collapsing together redundant entires in<br>
the if/else staircase to get the code size down and show us what else we can<br>
optimize.<br>
<br>
A lot of the cleanups we're doing to the code are things the Lattice optimizer<br>
is already finding, but not all of them, and getting it all collated helps us<br>
see where can shuffle muxes around and such to make it smaller.<br>
<br>
The original reason we started doing the if/else staircase version was because<br>
that's what you need to make an ASIC anyway, and it turns out to be easier for<br>
software developers to read and understand. :)<br>
<br>
When we're done with the instruction decoder (pipeline stage 2), there are<br>
potential cleanups in the execution engine (pipeline stage 3). (We already did<br>
one but Jeff refused to upload it to github when I asked him, I'll probably have<br>
to redo it.)<br>
<br>
Rob<br>
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