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<p class="MsoNormal">Hello,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">I was wondering if someone could tell me the function of the memory_fpga.vhd module. I have almost been able to fully synthesize the entire SOC using Vivado, and the only thing that it’s telling me right now is that I’m missing that file.
However, I had diffed the two memory_fpga files produced from the make process of both the mimas_v2 and the microboard, though both files were extremely long there were only 4 lines different from the two. So I just wanted to know if there was a significant
difference between the two, and is the memory_fpga file board specific at all. If it is then I will have to make one for the Kintex 7 KC705, if it’s not then I will just use one of the two files.
<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Also, porting the core into Vivado gave an error of DRC 23-20 LUTLP-1, which is a combinatorial loop in some logic, there were 3 modules in particular, 2 in the decode_core and one in the datapath I believe. I was also wondering if the
J2 was compatible with superH-2A architecture?<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Thank you,<o:p></o:p></p>
<p class="MsoNormal"><o:p> </o:p></p>
<p class="MsoNormal">Santiago Gutierrez<o:p></o:p></p>
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