[J-core] Hi - more info on Super-H advantages

[Dru Nelson]

Hi,

I saw a video of the announcement of the j-core project a while back.
The project impressed me, and I made a note to learn more.

Without that presentation, I would not have known about the advantages of
the SH architecture.
For example, I would not have known about the code-density of the SH.
I would have just assumed it was like all the other RISCs. (32 bit
instructions)

I did a little digging, but there is not a lot of info out there.

Given your access to the original designers (or not), what are the other
clever design choices that this CPU pioneered?

Dru Nelson
Redwood City



BTW, I also perused the programmers guide, and one thing struck me.
The assembly code for the SH looks a bit like 68K assembly. They even hint
at this with mentions of "Other CPU" in the beginning of the document.
The fact that it is 16 registers and uses a 16 bit instruction format
furthers that notion.
Yet, I couldn't find a mention of that anywhere.
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