[J-core] [RFC] SIMD extention for J-Core
Ken Phillis Jr
kphillisjr at gmail.com
Wed Oct 25 19:59:49 EDT 2017
I figure I will include my Idea for an easy to use SIMD Extension for
the J-Core. In general this extension will be used for Three Types of
number formats...
Format 1: Signed, and Unsigned Integers
Format 2: Floating Point Values
Format 3: Fixed Point Values - This is low priority, and most likely
will be dropped unless sample applications requiring this
functionality can be found. Also, in many cases, this can be simulated
using existing floating point and integer math routines.
New CPUID Flags:
SIMD_INTEGER8
SIMD_INTEGER16
SIMD_INTEGER32
SIMD_INTEGER64
SIMD_HALF_PRECISION_FLOAT
SIMD_SINGLE_PRECISION_FLOAT
SIMD_DOUBLE_PRECISION_FLOAT
New Registers: simd0 to simd15
These Registers are 128-bits in size, and are used to perform a bulk
of the SIMD Math.
SIMD Configuration Instructions:
SIMD.IMODE - This configures the Integer Math mode of the Integer SIMD
Operations. The accepted modes should include the following:
* Integer Carry Mode - See ADDC and SUBC for example.
* Value UnderFlow and OverFlow Mode - See ADDV and SUBV for examples.
* Integer Type: Signed and Unsigned values with sizes of 8-bit,
16-bit, 32-bit, and 64-bits.
SIMD.FMODE - This configures the Floating Point Mode. This can change
the Operation Data size, and In particular the SIMD FPU should support
Half-Precision ( 16-bit), Single Precision (32-bit), and Double
Precision (64-bit) Floating Point numbers. This also has configuration
settings for what happens when Floating point errors occur.
Data Manipulation Instructions:
SIMD.MOV - The MOV Instruction, but for the SIMD Registers. There is
no need for a SIMD.FMOV Instruction since there is only one set of
registers.
SIMD.SHUFFLE - This instruction allows for Free form byte reordering.
A close example of an existing instruction is the SWAP instruction.
SIMD.ROTL - Left Binary Shift
SIMD.ROTR - Right Binary Shift
Bitwise Operations:
SIMD.AND - SIMD Variation of the AND instruction.
SIMD.NOT - SIMD Variation of the NOT instruction.
SIMD.OR - SIMD Variation of the OR instruction.
SIMD.XOR - SIMD Variation of the XOR instruction
Integer Arithmetic:
SIMD.ADD - See: ADD Instruction.
SIMD.SUB - See: SUB Instruction
SIMD.MUL - Integer Multiplication.
SIMD.DIV - Integer Division.
Integer Composite Instructions:
SIMD.ABS - Absolute Value.
SIMD.MIN - Minimum Value
SIMD.MAX - Maximum Value
Integer Comparison:
SIMD.CMP/EQ - Data Parallel version of CMP/EQ
SIMD.CMP/GT - Data Parallel version of CMP/GT
Floating Point Arithmetic:
SIMD.FADD - See: FADD Instruction.
SIMD.FSUB - See: FSUB Instruction.
SIMD.FMUL - See: FMUL Instruction.
SIMD.FDIV - See: FDIV Instruction.
Floating Point Composite Instructions:
SIMD.FABS - Floating Point Absolute Value.
SIMD.FMIN - Floating Point Minimum Value.
SIMD.FMAX - Floating Point Maximum Value.
SIMD.FSQRT - Floating Point Square Root.
Floating Point Comparisons:
SIMD.FCMP/EQ - Data Parallel version of FCMP/EQ
SIMD.FCMP/GT - Data Parallel version of FCMP/GT
Data Loading/Conversion Instructions:
Bulk Conversion From Integers to Floats, and Floats to integers is a
must. That said, I'm not exactly sure how many Instructions are needed
for this, but It would be reasonable to say that four to seven
instructions may be required.
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