[J-core] Equiv of a datasheet?

Rob Landley rob at landley.net
Fri Jan 6 12:47:24 EST 2017


Jeff's reply didn't go to the list properly...

On 01/06/2017 02:07 AM, D. Jeff Dionne wrote:
> Don A. Bailey wrote:
>>
>> Hi All,
>>
>> I'm very happy to have accidentally stumbled upon the j-core project
>> today. I'm currently involved in RISC-V and it's wonderful to see
>> another open source CPU project. I'm interested in using the j-core
>> sh2 "clone". Is there the equivalent of a datasheet? I'd like to
>> learn how to port my custom operating system to it, but I'm having
>> trouble finding clear SH-2 architecture documents that describe more
>> than the instruction set. E.g. what are the vectors
>> in the VBR, what is the order, etc.?

I'm usually a bit further down in the software stack on this project,
and Rich is offline this week, but here's the patch series that added
interrupt controller support to the Linux kernel?

  http://lkml.iu.edu/hypermail/linux/kernel/1608.0/03337.html

We've basically been using the Linux device tree to document this stuff:


https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/tree/arch/sh/boot/dts/j2_mimas_v2.dts

>> Any advice is appreciated. Congrats on a very cool project!
>> Best,
>>
>> Don A. Bailey
>> Founder / CEO
>> Lab Mouse Security
>
> We’ve got this.  It’s very out of date… that is, contains now completely
> incorrect, not just incomplete, information.  But it could be a starting
> point.  As for the ISA, we have relied on Hitachi documents, and
> architecture is not documented (at least not completely).
> 
> J

The hitachi document is probably:
http://koti.kapsi.fi/~antime/sega/files/h12p0.pdf

Although for an ISA reference we've more recently been using:
http://www.shared-ptr.com/sh_insns.html

As the j-core web page says, our local changes for j2 are:

> We've added two backported sh3 barrel shift instructions (SHAD and
> SHLD) to make modern compilers happy, and a new cmpxchg (mnemonic
> CAS.L Rm, Rn, @R0 opcode 0010-nnnn-mmmm-0011, based on the IBM 360
> instruction).

Current gcc/binutils has cpu "j2" which knows about these changes. We're
using https://github.com/richfelker/musl-cross-make to build fdpic
toolchains, using something vaguely like:

make install OUTPUT=~/cross-sh2eb-linux-muslfdpic \
  TARGET=sh2eb-linux-muslfdpic GCC_CONFIG=--disable-nls \
  --disable-libquadmath --disable-decimal-float --with-cpu-mj2

(I have wrapper scripts that build various static and native toolchains
for different targets, that was me sticking an "echo" in front of the
make call to build the simple j2 one, once the script had worked out the
arguments.)

There's a j2_defconfig under arch/sh in current Linux kernels you can
use to build a kernel targeted for the Numato board with that toolchain.
(Rich asked me to upload a dtb file and I forgot, but you can build it
from above dts file using dtc.)

As for root filesystem, we're just doing a simple initramfs on the open
source side. (It's got mmc sdcard support but it's fairly slow.) I'm
doing a talk on building tiny root filesystems at ELC next month, which
should eventually be listed on here:

http://events.linuxfoundation.org/events/embedded-linux-conference/program/schedule

And presumably video will go up sometime after that?

Rob


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