July 2016 Archives by subject

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Starting: Tue Jul 12 08:48:15 EDT 2016
Ending: Sun Jul 31 15:08:57 EDT 2016
Messages: 69

• [J-core] [Help request] I can't get the microcode generator to run   Robert Ou
• [J-core] [Help request] I can't get the microcode generator to run   Geoff Salmon
• [J-core] [Possible bug] It seems only decode_table_reverse.vhd works out of the decode implementations   Robert Ou
• [J-core] [Possible bug] It seems only decode_table_reverse.vhd works out of the decode implementations   Robert Ou
• [J-core] [VHDL help request] Could someone explain how J-core uses VHDL configurations?   Robert Ou
• [J-core] [VHDL help request] Could someone explain how J-core uses VHDL configurations?   Geoff Salmon
• [J-core] All of my patches now collected on GitHub   Robert Ou
• [J-core] All of my patches now collected on GitHub   Geoff Salmon
• [J-core] Delay slots 2: Electric Boogaloo (Illegal instructions in delay slots)   Robert Ou
• [J-core] Delay slots 2: Electric Boogaloo (Illegal instructions in delay slots)   Rich Felker
• [J-core] Delay slots 2: Electric Boogaloo (Illegal instructions in delay slots)   Rob Landley
• [J-core] Delay slots 2: Electric Boogaloo (Illegal instructions in delay slots)   Rich Felker
• [J-core] FYI nvc is active.   Rob Landley
• [J-core] Illegal instruction handling (was: Re: PC-relative loads and delay slots)   Robert Ou
• [J-core] Illegal instruction handling (was: Re: PC-relative loads and delay slots)   Robert Ou
• [J-core] Illegal instruction handling (was: Re: PC-relative loads and delay slots)   Rich Felker
• [J-core] Illegal instruction handling (was: Re: PC-relative loads and delay slots)   Robert Ou
• [J-core] Illegal instruction handling (was: Re: PC-relative loads and delay slots)   Rich Felker
• [J-core] Illegal instruction handling (was: Re: PC-relative loads and delay slots)   Rob Landley
• [J-core] Illegal instruction handling (was: Re: PC-relative loads and delay slots)   Robert Ou
• [J-core] Is there documentation for vhm files and the v2p script?   Robert Ou
• [J-core] Is there documentation for vhm files and the v2p script?   D. Jeff Dionne
• [J-core] I successfully built jcore-source-latest.tar.gz   Brian Bartholomew
• [J-core] I successfully built jcore-source-latest.tar.gz   Rob Landley
• [J-core] J-Core: Style Sheet Donation   Rob Landley
• [J-core] J-Core: Style Sheet Donation   Rob Landley
• [J-core] J-Core: Style Sheet Donation   Santiago Gil
• [J-core] J-Core: Style Sheet Donation   Santiago Gil
• [J-core] J-Core: Style Sheet Donation   Rob Landley
• [J-core] J-Core: Style Sheet Donation   Santiago Gil
• [J-core] J-core address errors and other questions   Robert Ou
• [J-core] J-core address errors and other questions   Rich Felker
• [J-core] J-core address errors and other questions   D. Jeff Dionne
• [J-core] J-core address errors and other questions   Rob Landley
• [J-core] J-Core Members in Japan   帝都 久利寿
• [J-core] J-Core Members in Japan   帝都 久利寿
• [J-core] J-Core Members in Japan   Rob Landley
• [J-core] J-Core Members in Japan   Rob Landley
• [J-core] J-Core Members in Japan   帝都 久利寿
• [J-core] MyHDL+J-core+Verilog demonstration   Robert Ou
• [J-core] New Numato Mimas, no serial output from boot loader or Linux   Brian Bartholomew
• [J-core] New Numato Mimas, no serial output from boot loader or Linux   Rich Felker
• [J-core] New Numato Mimas, no serial output from boot loader or Linux   Brian Bartholomew
• [J-core] OT: Sega Saturn HomeBrew Success   Christopher Friedt
• [J-core] PC-relative loads and delay slots   Robert Ou
• [J-core] PC-relative loads and delay slots   Rich Felker
• [J-core] PC-relative loads and delay slots   Robert Ou
• [J-core] PC-relative loads and delay slots   Rich Felker
• [J-core] PC-relative loads and delay slots   Robert Ou
• [J-core] PC-relative loads and delay slots   Rich Felker
• [J-core] PC-relative loads and delay slots   Robert Ou
• [J-core] PC-relative loads and delay slots   D. Jeff Dionne
• [J-core] PC-relative loads and delay slots   D. Jeff Dionne
• [J-core] PC-relative loads and delay slots   Rich Felker
• [J-core] PC-relative loads and delay slots   Geoff Salmon
• [J-core] PC-relative loads and delay slots   D. Jeff Dionne
• [J-core] Sega saturn retrocomputing.   Rob Landley
• [J-core] Sega saturn retrocomputing.   Christopher Friedt
• [J-core] Sega saturn retrocomputing.   Rob Landley
• [J-core] Sega saturn retrocomputing.   Christopher Friedt
• [J-core] Sega saturn retrocomputing.   Rich Felker
• [J-core] Sega saturn retrocomputing.   Christopher Friedt
• [J-core] VHDL to silicon pathway?   Travis Ayres
• [J-core] VHDL to silicon pathway?   D. Jeff Dionne
• [J-core] What is the correct way to reset the CPU?   Robert Ou
• [J-core] What is the correct way to reset the CPU?   Geoff Salmon
• [J-core] What is the correct way to reset the CPU?   D. Jeff Dionne
• [J-core] What is the correct way to reset the CPU?   Rob Landley
• [J-core] What is the correct way to reset the CPU?   D. Jeff Dionne

Last message date: Sun Jul 31 15:08:57 EDT 2016
Archived on: Sun Jul 31 15:13:33 EDT 2016

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